CSS Mixed Signal ASIC Solutions

 I recently conducted a Quality Audit, which encompassed site-wide activities and documentation compliance of UNISEM, Batam Indonesia and UNISEM, Ipoh Malaysia integrated circuit manufacturing plants.The audit methodology included personal interviews, observation, document/record reviews and Custom Silicon Solutions Audit check list. The Audit included the review of the following: process flow, Travelers, Training program, the process for Change Order approvals, Material Receiving and Shipping, Calibration tracking/records, Wafer saw process and the ESD control program.

I found that the Unisem Ipoh and Unisem Batam Quality Management system complies with ISO 9001. The reviewed procedures and observation conclude that the Unisem corporate direction is dedicated to Quality control. The personnel interviews during the audit found that Operators and Quality Control personnel work to a high degree of efficiency. The 10 to 1 ratio (operators to QC) on the manufacturing floor enhances product reliability. All operating procedures (machine setup), and engineering specifications are clearly defined and followed.

Audit results found that the Unisem ESD control program complies with ANSI/ESD S20.20. Monitoring of the proper use and handling of equipment and devices were observed. For example; Ionizers wrist straps, grounded floors, ESD lab furniture and the monitoring and recording of the Temperature and Humidity. During the wafer saw operation the Co2 Bubbler is always active. There is a constant monitoring device in the wafer saw to find chip outs and saw integrity. The utilization of an automated pick and place machine eliminates the human contact risk of an ESD event. Particle Count, DI water and Temperature/Humidity statistical analysis is recorded, displayed and readily available upon request.The Training department operates at a high level of proficiency. Training records and procedures are controlled and employee training status is updated routinely. The employee ID system identifies operating qualification and due dates.

All relevant observations were discussed and agreed as understood with appropriate personnel.

Overall Unisem proved to provide high quality products and services with excellent quality.

To top off my visit I played a round of golf at the Clearwater Sanctuary Golf  Resort in Malaysia.

CSS participated in the UCLA Golf Classic at Cota de Caza Golf Club on May 3, 2010 in Orange County, California.

Now in its ninth consecutive year, the UCLA Golf Classic is the largest and most anticipated Bruin fundraiser in Orange County.  Benefiting the UCLA Alumni Association’s Scholarship Program, the UCLA Fund and The Wooden Athletic Fund, this standout event supports the scholars and athletes of today and the campus of tomorrow.  In its history, the UCLA Golf Classic has raised over $270,000.  CSS also sponsored a Tee Sign for the event.

The CSS foursome playing on Monday included Frank Bohac, CSS Director of Design; Greg Ochinero, ON Semiconductor Regional Sales Manager; Robert Shackelford, CSS Operations Manager and Keith Shelton, CSS President.  Our foursome did not place, but we had a great day of golf followed by cocktails, auctions, and a buffet dinner.  At the cocktail hour, Robert and Keith had chance to meet the UCLA Spirit Squad.

CSS has hired Mike McDaid as its Director of Sales. Mike was previously the Senior Account Manager at Smart Modular Technologies, Inc., a publicly held designer and manufacturer of memory subsystems. Prior, Mike was the Area Sales Manager for Netlist, Inc., and the Director of OEM Sales for Viking Components, Inc. Mike McDaid has a Bachelor of Science in Finance from California State University, Long Beach.

We are very pleased at CSS to have Mike join our team. His experience and skills will enable us to accelerate our growth in the custom ASICs and standard products markets.

Lower system power comes naturally for an ASIC.  By combining separate digital and analog functions in one chip, power is automatically reduced as the capacitance between these functions is dramatically reduced.   Power reductions of 2X to 10X are possible with no sacrifice in performance.

Even more power reduction can often be achieved in an ASIC by optimizing power reduction in a trade-off with speed.  One can achieve very low power in an ASIC if high speed is not required.  This trade-off is usually not available to a significant degree in standard products as they are often a compromise of speed and power to meet the largest market segment.  Low power is an area that we specialize in at CSS.  Many of our ASIC customers have a requirement for very low power and high speed is not required.  This allows us to design their ASIC to operate at extremely low power.  Some examples are instructive.

Applications with battery power usually want to conserve power to extend the battery life.  One of our ASICs is required to operate on its battery for 20 years!  The battery is about the size of that for a PC.  Another ASIC is required to work with an operating current of 50 nano-amps.  With this extremely low current drain, the ASIC could operate on two AAA batteries for 3.5 years.

These examples illustrate that for very low power applications, an ASIC may be the only solution.  For less severe power requirements, power may be reduced to a minimum for the required speed.  This may be the case for an ASIC in a “green” application that simply strives to conserve energy by not using more energy than is necessary for the application.

If you have a need to reduce power in your electronic system, and especially if you need to significantly reduce power, a low power ASIC is an excellent way to go - it may be the only way to go.  Please give us a call or email your requirement.  We know how to lower power and will be happy to show you what can be done for your application.

Custom Silicon Solutions was invited to attend the ON Semiconductors Executive Conference in Scottsdale, Arizona during the last week in February.  This annual event provides an opportunity for ON’s major customers to meet one-on-one with ON Executives and discuss how to work together more productively.  The 3-day event consisted of a General Session and then Breakout Sessions.

The General Session began with David Somo, Vice President Corporate Marketing, presenting opening remarks and outlining the events for the conference.

Keith Jackson, President, CEO and Director, followed with an in-depth review of event of the past year.  These events were dominated with the sharp demand experienced since the end of 2009 – assumed to be primarily a result of the considerably reduced inventories during the recession.  ON indicated that they were experiencing an unprecedented order rate as the economy begins its recovery.

Bob Mahoney, Executive Vice President, described ON’s marketing strategy – to expand their SAM and SOM through acquisitions, new products and integrated solutions.  Major acquisitions over recent years include:  LSI Logic Gresham Fabrication Facility in 2006, Analog Devices CPU Voltage & PC Thermal Monitoring Business in 2007, AMI Semiconductor and Catalyst Semiconductor in 2008, PulseCore Semiconductor in 2009 and California Micro Devices in 2010.

An Operations overview was presented by John Nelson, Executive Vice President and COO.  John indicated that lead times are extending for materials, capital equipment and for products from ON Semiconductor with all markets continuing to ramp up.  He also indicated that 2010 Capital spending will focus on Back-End expansion as enhanced utilization of the Gresham facility reduces need for Front-End capital.

In the days following the General Session, Breakout Sessions were held individually with the Companies present.  This was an ideal opportunity for executives to discuss issues and make plans for the coming year.

A golf tournament was held to round-out the experience.  ON hosted the scramble event at the McCormick Ranch Golf Club.  The tournament was well attended and fully enjoyed by all.  CSS was represented in the following foursome, including left to right:  Laurent Jenck (Director of Power Supply Applications & Marketing, APRG (ON Semi), Terry Conant (Executive Vice President, ID Tech), Greg Ochinero (Sales Area Director Western Area & Latin America, ON Semi) and Keith Shelton (President, Custom Silicon Solutions).

Many of our customers have very long-term program lifetimes. We have experienced program lifetimes over 20 years – from initial design of the ASIC through high volume production to the decline of sales prior to development of a replacement product.   ASIC development requires our commitment to provide the product to the customer from beginning to end.   This may require changes in the silicon fabrication process as technology evolves, changes in the package (such “green” packages) and it certainly involves our product engineers continuously monitoring the entire production process to assure that yield and quality is maintained.

We just renewed an annual agreement for continued production of an ASIC with a customer we have worked with for many years. We have been producing this ASIC in millions annually for over three years and plan to continue production for the lifetime of our customer’s product.  We have experience with other long term customers, where the annual volumes are volatile and change with market conditions. We fully supported these changing requirements.  Long-term commitment to customer support is essential for a successful ASIC company and CSS is in business to provide that kind of service.

I attended key sessions of the SoC (System on a Chip) conference in Newport Beach in November. I found a panel discussion titled “Exploring Opportunities for the Integration of Silicon and Biotechnology” to be of particular interest since CSS has developed ASICs for biomedical and medical instrument applications. The panel was made up of professors and industry experts from USC, UCSD, UCI, UCLA, The Canadian Consulate and XFAB. Possible applications for silicon in biotechnology include blood testing, diabetic monitoring, and DNA testing. The panelist noted that silicon suppliers are driven by volume, hence applications that are time sensitive, and repeatable which might require a disposable ASIC would be of very high interest.

Applications in which CMOS could potentially be used are low cost healthcare solutions such as checking for swine flu or Bio-micro sensors. Some of the questions addressed by the panelist included the capabilities of the ASIC - do they provide enough sensitivity, do they have enough dynamic range required how are devices moved from the lab to the consumer or physician?

The panel also discussed possible breakthrough technologies, or “killer applications” which could be solved over the next 20 years. One is an artificial retina. Currently there are clinical trials in Europe for a device with 250 pixels. A breakthrough technology will be needed with more pixels, and a material with plasticity not characteristic of CMOS. Nanotechnology was mentioned as a possibility for meeting this requirement. What would be needed is a photoreceptor with 1,000,000 pixels.

Another future application for silicon in biotechnology is biomarkers. This could lead to more specialized cancer detection. A goal would be to reduce the cost and speed the process for DNA sequencing.

The meeting has generated ideas for new ASIC applications with biomedical companies.

The CSS555C, a micro-power, programmable, 555 type timer, was selected as Finalist for Best 2009 Product in the Design News Golden Mousetrap Design Contest.  Frank Bohac, Head of Design at CSS, is the proud designer of this innovative product.  The product specifications can be viewed in the CSS website at http://www.customsiliconsolutions.com/products-for-ASIC-solutions/standard-IC-products.aspx.  See the full listing of Finalists at http://www.designnews.com/channel/Golden_Mousetrap_Finalists.php

CSS555C Best Product for 2009 Finalist

A quote from Design News Editor-in-Chief Karen Field:   “Design News congratulates the winners and finalists of the 2009 Golden Mousetrap Awards for the great work they’ve done to develop new and innovative products for design engineers. These products showcase the highly imaginative ways that today’s engineers are ‘building a better mousetrap,’ and we thank them for their contributions.”

Earlier this year in this Blog, I discussed the advantages of a custom mixed-signal ASIC.  Saving money in production over the costs of the components it replaces is one of these advantages.  However, to save money, the savings in production should compensate for the development costs (NRE) in a reasonable amount of time.  This may indicate a relatively high level of production.  However, at CSS we have a way to reduce the NRE for the smaller production requirement.  Typically, we can reduce the NRE cost by 50% for these cases.

A typical ASIC at CSS for high level production may have a development cost (NRE) of $250K.  This is a relatively low NRE for a custom mixed-signal ASIC and reflects our efforts to maintain low NRE costs by optimizing the design process to meet our customer’s needs.  Let’s assume that a custom ASIC can save up to 50% of the cost of the components it replaces.  If a customer wanted to recoup their NRE investment in one year.  They would need to have an annual bill of materials for the original components of $500K.  This may be difficult to meet and would seem to rule-out a custom ASIC for smaller production needs.

However, CSS can significantly reduce the development costs for lower volumes, making a custom ASIC financially attractive.  Working with our silicon fabrication foundries, we can reduce the Mask (or Reticle) costs, a considerable part of the NRE cost, by using a Multi-Layer-Reticle (MLR) approach.  These MLR masks are restricted to low production levels – all we usually need in these cases.  For a straightforward design, using MLR masks, an NRE of $125K is typical.  Using the same financial constraint as the 1st example, a minimum annual bill of materials here would be about $250K, or a 50% reduction in the annual production level.

A further reduction in NRE can be achieved with severe limits on production.  By sharing a mask set with other customers, a custom ASIC can be developed for very low costs.  This approach is often used to prove the concepts and performance of the ASIC with the minimum investment – essentially just the design costs.  After the ASIC is ready for production, production level masks are easily procured.

These examples are typical.  The complexity of the design is also a key factor. Using the above approach, development costs typically range from $50K to $500K.  However, by using our library of proven mixed-signal circuits and by careful selection of a fabrication process to match our customer’s needs, we are able to provide truly low development costs.

CSS can give potential customers a free estimate of both the development NRE and the production unit cost.  With this information, a sound financial decision regarding a custom ASIC development can be made.

Custom Silicon Solutions (CSS) has just released SPICE simulation models for our CSS555 and CSS555C ICs.  These models provide a simulation capability at the component level.  To make them portable across many simulators, only Level 1 device models are used.  The voltage comparators are modeled with BLM gain blocks to reduce simulation time.  Even with these simplifications, the model provides a very good representation of the real IC.

Features:

The CSS 555 Timer model includes:

   1) Supply Current (over V_DD)

2) Input Switch Levels

3) Propagation Delay Time

4) Output Drive (over temperature and V_DD)

5) ESD Clamp Diodes and Pad Capacitance

The power and trip level settings (stored in EEPROM) change the IC’s supply current, propagation delay and trip level parameters.  Separate SPICE model files are provided for each combination of power and trip level settings.

CSS 555 SPICE Model

The CSS555 SPICE model has been structured to provide an accurate model that runs quickly and is compatible with most SPICE simulators.  It includes the analog portion of the IC and covers most of the important electrical characteristics, including supply current, input levels, output drive and propagation delay.  The model can be used over a wide operating range: V_DD = 1.2V to 5.5V, Temperature = -40°C to +85°C.  Most of the device parameters are valid across this range.  Models for different configuration settings (power & trip levels) are also provided, along with tables to adjust the models for worst-case conditions.  Complete details are provided in Application Note 555-2 “CSS555 SPICE Model”.